| Bildiri Türü |
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Bildiri Dili | |
| Bildiri Alt Türü | Tam Metin Olarak Yayınlanan Tebliğ (Uluslararası Kongre/Sempozyum) | ||
| Bildiri Niteliği | Alanında Hakemli Uluslararası Kongre/Sempozyum | ||
| Kongre Adı | 2018 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) | ||
| Kongre Tarihi | / | ||
| Basıldığı Ülke | Basıldığı Şehir | ||
| Bildiri Linki | https://ieeexplore.ieee.org/abstract/document/8434843/ | ||
| UAK Araştırma Alanları |
Halı-Kilim ve Dokuma
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| Özet |
| Approximate computing is exploited in implementation of fully connected networks for classification problems. A multiplier structure whose area is scalable over accuracy through approximate computing is proposed. In order to employ the multipliers in a network, an area reduction algorithm is formed. It can adjust the approximation level of multipliers while still maintaining the target classification performance, without prior information on the value of network weights. Implementing on a Spartan6 FPGA, up to 79% area saving is recorded for various performance targets. |
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