RD53 pixel readout integrated circuits for ATLAS and CMS HL-LHC upgrades
Yazarlar (104)
Y Khwaira
R Kluit
D Koukola
A Krieger
H Krüger
J Lalic
M Lauritzen
F Licciulli
Peilian Liu
F Loddo
E Lopez Morillo
A Lounis
F Luongo
Massimo Manghisoni
S Marconi
F Marquez Lasso
C Marzocca
K Mauer
A Mekkaoui
Lingxin Meng
M Menichelli
M Menouni
M Minuti
M Mironova
S Miryala
M Missiroli
E Monteil
K Moustakas
F Muñoz Chavero
G Neue
S Orfanelli
A Paccagnella
L Pacher
F Palla
FR Palomo Pinto
A Papadopoulou
A Paterno
AR Petri
P Placidi
R Plackett
A Pradas
A Pulli
B Raciti
L Ratti
Valerio Re
A Rehman
P Rymaszewski
P Sander
MC Solal
M Standke
B Stugu
E Thompson
Gianluca Traversi
D Vogrig
M Vogt
Tianyang Wang
Prof. Dr. Hasan OĞUL Sinop Üniversitesi, Türkiye
J Zdenko
RD53 collaboration
Sinop Üniversitesi
Gianluca Alimonti
A Andreazza
F Arteche
MB Barbero
P Barrillon
R Beccherle
G Bonomelli
GM Bilei
W Bialas
D Bortoletto
G Calderini
A Caratelli
A Cassese
J Christiansen
E Conti
F Crescioli
M Daas
L Damenti
S d'Auria
F De Canio
G De Robertis
N Demaria
J DeWitt
Y Dieter
A Dimitrievska
W Erdmann
S Esposito
D Exarchou
D Fougeron
Luigi Gaioni
M Garcia-Sciveres
D Gnani
C Gozalez Renteria
M Grippo
A Guardino
M Hamer
T Heim
T Hemperek
F Hinterkeuser
S Huiberts
LM Jara Casas
JJ John
J Kampkötter
M Karagounis
I Kazas
Makale Türü Özgün Makale (SSCI, AHCI, SCI, SCI-Exp dergilerinde yayınlanan tam makale)
Dergi Adı Journal of Instrumentation (Q3)
Makale Dili Basım Tarihi 03-2025
Cilt / Sayı / Sayfa 20 / 3 / – DOI 10.1088/1748-0221/20/03/P03024/meta
Makale Linki https://iopscience.iop.org/article/10.1088/1748-0221/20/03/P03024/meta
UAK Araştırma Alanları
Nükleer Fizik
Özet
The RD53 collaboration has since 2013 developed new hybrid pixel detector chips with 50 × 50 μm2 pixels for the HL-LHC upgrades of the ATLAS and CMS experiments at CERN. A common architecture, design and verification framework has been developed to enable final pixel chips of different sizes to be designed, verified and tested to handle extreme hit rates of 3 GHz/cm2 (up to 12 GHz per chip) together with an increased trigger rate of 1 MHz and efficient readout of up to 5.12 Gbits/s per pixel chip. Tolerance to an extremely hostile radiation environment with 1 Grad over 10 years and induced SEU (Single Event Upset) rates of up to 100 upsets per second per chip have been major challenges to make reliable pixel chips. Three generations of pixel chips, and many specific mixed signal building blocks and radiation test chips, have been submitted and extensively tested to get to final …
Anahtar Kelimeler
BM Sürdürülebilir Kalkınma Amaçları
Atıf Sayıları
Google Scholar 30
RD53 pixel readout integrated circuits for ATLAS and CMS HL-LHC upgrades

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